useful source - implementation of EPS from another university https://github.com/spacelab-ufsc/eps2
List of changes made from the CSDC-6 EPS board design - Jan 2025 (Lewis Stone)
- changed oscillator input/output caps from 15pF to 10pF based on datasheet and research
- fixed PGOOD diode configuration on 5V and 3V3 buck converters
- replaced BOOT/SW caps
- For MPPT Breakout REV 2 I reconfigured MPPT buck converter:
- switched to consistently using the B model of the buck
- re-designed the feedback resistor network to get the proper range of output voltages with the digital pot
- Removed one of the 22uF caps on input and output since we had 3 of each (a little overkill)
- Considered switching buck to buck-boost - realized this was due to my lack of knowledge on how solar cells work.
- Replaced the current sense amplifier with a higher gain to use smaller resistor for lower resistive loss (200V/V)
- Fixed addressing on the MPPT digital pots by tying them high/low directly rather than driving with MCU
- Decided not to add bootstrap diode since no reliable 5V supply on this board and very unlikely for duty cycle to exceed 66%
EPS MPPT Buck Calculations
Using site https://www.monolithicpower.com/learning/resources/how-to-calculate-a-buck-converters-inductance
- Ranging output voltage from 5V-10V. With an input voltage of 12V-17V that gives a duty cycle range of 29% to 83%
- 800kHz oscillation frequency on the RT8297B model - t on = 1.25 us
- Picked ripple factor of 20% (bit lower than 30% which is what I found online)
- max: L = ( (17-5) * 1.25 us * 0.29 ) / 0.3A = 14.5 uH
- min: L = ( (12-10) * 1.25 us * 0.83 ) / 0.3A = 6.92 uH